Combination of ultra-thin high-density silicon capacitors and power supply network (BSPDN) on the ba
This invention combines Ultra-Thin High-Density Silicon Capacitors (UTHDSC) with a Backside Power Supply Network (BSPDN) specifically for the 2nm semiconductor node. It addresses power stability and noise issues by embedding high-capacitance, low-ESR/ESL capacitors on the wafer's backside. This ensures stable voltage delivery and reduces power loss, enabling high-performance AI and computing chips to operate more efficiently within smaller device footprints.
At the 2nm node, extreme transistor density and fast switching speeds create significant power supply noise and voltage instability. Traditional front-side power delivery causes "routing congestion" where signal and power lines compete for space, leading to significant "IR drop" (voltage loss). Moreover, conventional capacitors are too bulky and suffer from high leakage currents at high temperatures, which compromises the reliability and energy efficiency of advanced processors.
The solution embeds UTHDSCs directly into the Backside Power Supply Network. By moving power delivery to the wafer's backside and placing capacitors closer to the transistors, it minimizes the power path length. These capacitors use advanced dielectrics to mitigate leakage and feature low ESR/ESL to provide near-instantaneous voltage compensation. This suppresses high-frequency noise and stabilizes the 2nm chip's performance while supporting thinner, high-density wafer-level fan-out (WLFO) packaging.
It addresses the "Power Delivery Bottleneck" and "Signal Interference" caused by traditional front-side routing. In prior art, as scaling reaches 2nm, power loss becomes unmanageable due to routing density. This invention resolves the physical conflict between power and signal lines through backside integration and overcomes the limitations of traditional capacitors regarding bulkiness and high-temperature leakage at the nano-scale.
Complete Specification
| Country | Current Status | Patent Application Number | Patent Applicant | Patent Number | Title | Google Patent Link |
| Taiwan | Issued | M668047 | Dollarchip Technology Inc. | TWM668047U | Combination of ultra-thin high-density silicon capacitors and backside power supply network in 2nm process | Click to open |